Preliminary Study of Image Reconstruction Algorithm on a Digital Signal Processor

Report No. ARL-MR-865
Authors: Daniel Rankin; Jeanine Cook; Song Park; Dale Shires
Date/Pages: March 2014; 22 pages
Abstract: With the advent of the parallel computing era, alternative processing solutions are examined for performance. Accelerators promise the potential to augment a system with only Intel or AMD central processing units. Specifically, digital signal processor (DSP) architecture is evaluated for computing image reconstruction algorithm. A Freescale DSP, drawing power in the range of 10 W, is considered for analysis. Software tools and programming techniques used during development are documented for the DSP platform. Preliminary results of the execution times are compared with graphics processing units and field programmable gate array technologies.
Distribution: Approved for public release
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Last Update / Reviewed: March 1, 2014