A Subthreshold Digital Library Using a Dynamic-Threshold Metal-Oxide Semiconductor (DTMOS) and Transmission Gate Logic

Report No. ARL-TN-0635
Authors: Timothy C Lee and Robert M Proie
Date/Pages: September 2014; 14 pages
Abstract: A digital library taking advantage of the subthreshold mode of operation is studied and different gate topologies are explored for trade-offs in area, power, and propagation delay. Lowering the supply voltage allows for significant reductions in power consumption due to the squared dependence on voltage in switching logic. Dynamic-threshold metal-oxide semiconductor (DTMOS) inverters were used to improve the speed of inverters and buffers. Transmission gate logic was used to implement arbitrary logic gates to avoid PUN/PDN imbalances of static logic gates in subthreshold. These modifications result in the added benefit of smaller and simpler implementation of XOR/XNOR, making for a more modular nature to implement the common logic gates. The library is used to implement 1-bit full adders and a CIC filter with low power consumption.
Distribution: Approved for public release
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Last Update / Reviewed: September 1, 2014