Hermetic Encapsulation of Nanoenergetic Porous Silicon Wafer by Parylene

Report No. ARL-TR-7025
Authors: Eugene Zakar, Wayne Churaman, Collin Becker, Bernard Rod, Luke Currano, John Conrad
Date/Pages: August 2014; 18 pages
Abstract: Parylene film is attractive for hermetic encapsulation of porous surfaces, including energetic materials, and for the protection of integrated circuits on large-diameter silicon substrates. Achieving uniformity and repeatability of chemical vapor deposited (CVD) parylene film on large-diameter wafers in a batch system is challenging. The difficulties are related to improper selection of the wafer attachment apparatus in the chamber, and the poor coating repeatability from run to run is attributed to wafer volume changes in the CVD chamber. We discuss hardware modifications and preparation methods that improve the predictability, uniformity, and adhesion of the parylene film on nanoporous silicon surfaces. Atomic force microscopy (AFM) can determine surface roughness and distinguish differences in nanoporous silicon etched surfaces. Energetic materials that are hygroscopic in nature need to be protected from the environment during storage to improved ignition lifetime. Parylene film is an effective moisture barrier for nanoporous-scale material applications. We tested the adequacy and lifetime of parylene protection layer for a nanoenergetic device and found the shelf life can be extended in environments with greater than 80% humidity.
Distribution: Approved for public release
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Last Update / Reviewed: August 1, 2014