OS Friendly Microprocessor Architecture

Report No. ARL-SR-0370
Authors: Patrick Jungwirth; Patrick La Fratta
Date/Pages: April 2017; 56 pages

We present an introduction to the patented Operating System Friendly Microprocessor Architecture (OSFA). The software framework to support the hardware-level security features is currently patent pending. We are interested in information technology and computer security professionals reviewing the hardware-level security features and information assurance features.

Conventional microprocessors have not tried to balance hardware performance and OS performance at the same time. The goal of the OSFA is to provide a high-performance microprocessor and OS. Computer security features are implemented in hardware. By extending Unix file permissions bits down to each cache memory bank and memory address, the OSFA provides hardware-level information assurance. OS-level access to memory is divided into access layers. For each software application, a table (white list) sets limits for all OS library function calls required by the application. Each library function call has a set of object limits. The cache bank memory pipeline architecture and permission bits provide features to balance the complexities of hardware, software, and computer security.

Distribution: Approved for public release
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Last Update / Reviewed: April 1, 2017